GS880Z18BT-200

Product Summary

The GS880Z18BT-200 is a 9Mbit Synchronous Static SRAM. GSI NBT SRAMs, like ZBT, NtRAM, NoBL or other pipelined read/double late write or flow through read/single late write SRAMs, allow utilization of all available bus bandwidth by eliminating the need to insert deselect cycles when the device is switched from read to write cycles.The GS880Z18BT-200 may be configured by the user to operate in Pipeline or Flow Through mode. Operating as a pipelined synchronous device, meaning that in addition to the rising edge triggered registers that capture input signals, the device incorporates a rising-edge-triggered output register. For read cycles, pipelined SRAM output data is temporarily stored by the edge triggered output register during the access cycle and then released to the output drivers at the next rising edge of clock. The GS880Z18BT-200 is implemented with GSI high performance CMOS technology and is available in a JEDECStandard 100-pin TQFP package.

Parametrics

GS880Z18BT-200 absolute maximum ratings: (1)VDD Voltage on VDD Pins: –0.5 to 4.6 V; (2)VDDQ Voltage in VDDQ Pins: –0.5 to 4.6 V; (3)VI/O Voltage on I/O Pins: –0.5 to VDDQ +0.5 (≤ 4.6 V max.) V; (4)VIN Voltage on Other Input Pins: –0.5 to VDD +0.5 (≤ 4.6 V max.) V; (5)IIN Input Current on Any Pin: +/–20 mA; (6)IOUT Output Current on Any I/O Pin: +/–20 mA; (7)PD Package Power Dissipation: 1.5 W; (8)TSTG Storage Temperature: –55 to 125 ℃; (9)TBIAS Temperature Under Bias: –55 to 125 ℃.

Features

GS880Z18BT-200 features: (1)NBT (No Bus Turn Around) functionality allows zero wait read-write-read bus utilization; Fully pin-compatible with; (2)both pipelined and flow through NtRAM NoBLand ZBTSRAMs; (3)2.5 V or 3.3 V +10%/0% core power supply; (4)2.5 V or 3.3 V I/O supply; (5)User-configurable Pipeline and Flow Through mode; (6)LBO pin for Linear or Interleave Burst mode; (7)Pin compatible with 2M, 4M, and 18M devices; (8)Byte write operation (9-bit Bytes); (9)3 chip enable signals for easy depth expansion; (10)ZZ Pin for automatic power-down; (11)JEDEC-standard 100-lead TQFP package; (12)Pb-Free 100-lead TQFP package available.

Diagrams